Ingeniero de fpga Interview Questions

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Ingeniero De Fpga interview questions shared by candidates

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Omnitek
Hardware Designer (FPGA Developer) was asked...17 June 2013

How to use stack and heap in C programming language?

2 Answers

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Not difficult but quite confused. My first thought was how to implement stack or heap...Then I think maybe there are some std libraries. The stack is used for functional calls and heap is for dynamic allocation. Details is here http://stackoverflow.com/questions/79923/what-and-where-are-the-stack-and-heap. Less

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If i applied for a hardware job and they asked my a software question, I would walk out. Less

INOVA Geo
FPGA Developer was asked...12 May 2015

Why would you want to work for us?

1 Answers

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I answered that I talked with one of their current Engineer and asked him about his team, and his answer impressed me very much and i felt like I found the best team to work with. Less

GTS
FPGA Developer was asked...26 December 2022

Design and verify a simplified "router".

1 Answers

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Its a lot of work to get it "right" (IMHO 10 hours for solid verification alongside debugging or some optimization). Didnt have time before Xmas. Less

Morgan Stanley
Ow Latency Developer FPGA/C++ was asked...13 April 2017

If I called this guy (so and so that MD knew from previous job), what would he say about you ?

1 Answers

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Seems like an illegal question. HR should get involved to straighten out his MD.

Tradebot
FPGA Developer was asked...8 January 2021

What are blocking and non-blocking statements in Verilog?

1 Answers

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Blocking evaluations and assigns LHS & RHS of expression before moving to the next statement. Non Blocking evaluates the LHS and schedules for the RHS to be assigned at the end of the time step. Less

Tradebot
FPGA Developer was asked...8 January 2021

Some other fun engaging questions!

1 Answers

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Don’t worry, they are very fundamental!

Tradebot
FPGA Developer was asked...8 January 2021

What is a latch? What is a Flipflop?

1 Answers

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A Flip Flop is clocked, a latch isn’t. A latch is transparent when enabled, and stores its value when not enabled. A flip flop is made up of two latch’s enabled by clock and the other by inverted clock. This allows the flip flops value to held constant for a whole clock period. Less

GTS
FPGA Developer was asked...1 December 2021

Why are you leaving your current job?

1 Answers

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I’ve learned a lot in my current role, but I’m looking for the next step where I can continue to grow and use the skills I’ve honed to contribute to a company I love, and this opportunity seems to be the perfect fit. Less

National Instruments
Labview FPGA Software Engineer was asked...24 January 2011

logic optimization. design algorithm to reduce redundant circuit. share result of logics.

Mistral Solutions
FPGA Developer was asked...28 June 2022

what is buffer? what is latch?

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