Altera interview question

Asked about designing 4:1 mux using 2:1 mux and write verilog code,c program for swapping 2 variables without using a temp register, how the bidirectional pin would behave , frequency divider circuit,mestability,blocking and non blocking statements ,difference between dram and sram,diff between == and === in verilog,why gate level program is not written,finite state machine for a wending machine and writing the verilog code for it,questions related to sram project,clock domains in which the fifo would be working. Asked a whole lot of questions related to phase locked loops,ring oscillators and MIPS Project.