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      SoC DFT Engineer Interview

      18 Jun 2026
      Anonymous interview candidate
      No offer
      Positive experience
      Average interview

      Application

      I interviewed at Apple

      Interview

      45 minute technical round, was purely technical towards code DFT fundamentals, focused more on timing closure questions on dft along with setup and hold equations and some questions on controllability observability

      Interview questions [1]

      Question 1

      Issues in mixing +ve and -ve edge trig flops Setup and hold violations and how to mitigate it What’s the use of an OCC Asked a few questions on my resume, talked on how to generate internal reset patterns Asked what’s a tap controller how does it work, how does MBIST get triggered as scan mode will be low during a bist Blocking vs non blocking with code as example
      Answer question